Monthly Archives: September 2013

Transistor Porn

Don’t ask me why this post has this name! This is actually the post that started the idea for this Blog. I worked at Hydrix at the time, and an LTspice file was passed around from engineer to engineer. It was a very simple circuit demonstrating some transistor applications. Everyone who saw it found that it revealed something for them. Maybe that is why it got this ridiculous name!

There once was a young engineer. He could not learn anything, as he already knew everything. If he found one of his ideas at odds with the whole of the rest of the world, he dealt with this very easily by declaring the rest of the world wrong! He did leave a trail of instances where the poor old rest of the world just did not come up to scratch. It fell to others to sort these matters out. One instance was a circuit that consisted of a number of output driver circuits that were to have a 24 volt logic swing. The outputs all consisted of a 10k resistor to a +24 volt rail, and an active device to pull the output low.

I understand that this whole scheme had to be changed later, but in the fist instance, it looked as if the task was to set up the active device circuit to improve the switching times. Discussion arose about how this could best be done. That discussion gave rise to this circuit, which was passed around the office as an LTspice file.

Five simple circuits were compared. these were:
1. A transistor with a capacitor across the base drive resistor (Cap)
2. A transistor with a 10k base resistor (Plain)
3. A transistor as in 2. but with a shunt resistor from base to emitter (base_Shunt)
4. A transistor with a baker clamp (baker)
5. A BSS123 MOSFET
Later I added:
6. A 2n7002 MOSFET

Here is the circuit:


The turn off and turn on time comparisons were interesting.


Here are waveforms scaled to show the turn off times.
In inverse order of speed, we have:
Dark Brown – Transistor with capacitor across base drive
Pink – FET
Green – Baker Clamp (note the higher “on” voltage)
Khaki – 2N7002
Red – Transistor with Base Shunt
Blue Plain transistor

I changed to time scale to tease out the switch on waveforms.


The almost vertical line is the Dark Brown, Pink, and the Khaki all virtually superimposed.

Some Points (that I found) of Interest.
a) the drive circuit in the model was very fast (10ns transistion time) and of zero impedance. This is very unrealistic. It provided the current that was required to make the circuit with the capacitor across the base drive resistor as fast as it was. This circuit wouldn’t come up so well if the drive were squishy. In order to achieve the observed speed, the circuit with the capacitor actually required about 17 mA to drive it, even though the output current is only 2.4mA! Here is the drive current waveform (R13) in brown and the load resistor current in blue.

b) I tried some other circuits as well. A cascode made up of two npn transistors with about a volt and a half bias on the top base was quite quick. Several of the modern little SOT23 MOSFETs were tried and found to be not much good. They have large die area to get very low RDS(on), and consequently high inter-electrode capacitances. They are not suitable for such a high impedance circuit as this. The BSS123 has an RDS(on) of 6 ohms, and the 2N7702 has 2 ohms.
c) Notice that the switch on waveform for FETs actually rise before they fall. The BSS123 and the 2N7002 waveforms rise about 0.8 volts before they start to fall. It is interesting that with such a fast switching waveform, the gate to drain capacitance comes into effect before the FET really gets conducting.
d) Just to emphasize how unrealistically fast these drive waveforms are, I placed R14 in the 2N7002 gate. Peak gate current at switch on is 270mA!  The peak gate current at switch off is only about 63mA. In this case the impedance driving the drain dv/dt is much higher, and the Miller effect less severe. I have looked up several 2N7002 data sheets, and cannot find a peak gate current rating. I think if I really did have such a hard and fast drive, I would want to limit the gate current for such a tiny transistor.
What do you think?

 

 

Line Up the Fractions (Again)

This post is one of those posts where you really do have to have read the preceding post first. (So look below if you haven’t.) I wanted to show you what my “Vulgar Fractions Slide Rule” looked like. Each part of it consisted of a graph, as each fraction was represented by a line with a length representing the weight. You might recall that I had decided to weight the fractions with a factor equal to the reciprocal of the product of the fraction’s numerator and denominator. The reason for this was that whole number fractions where the whole numbers are small were considered much more significant than when the numbers were large.

It was tricky to get a graph to show you, as the style where each point is represented by a vertical line is not one of the styles readily available on the software I tried. I could get a graph on my screen, though, so what I have here is a photo of my computer screen.

I created this for you by taking the logarithm of the fraction value so that the abscissa  would have a log scale. Unfortunately this has not been properly achieved here, as this graph shows the data being equi-spaced on the abscissa, and we know that they are not. Regard the pictures on this post as indicative only. We do not have numbers on the abscissa, but you can easily see the fractions 1/1 with its weight of 1, and 2/1 with its weight of 0.5, 3/1 with a weight of 1/3 etc. The slide rule consisted of two pictures like this: the bottom one being a mirror image.

My crude graphics do not provide us with a abscissa scale, but you get the picture. Here we see the slide rule set for w/h = 1.226. The second and third red lines represent two possible room proportions that would meet the criterion:
First:      l/w = 1.37,  l/h = 1.68
Second: l/w = 1.78,  l/h = 2.18
I do not want to get too distracted by this, but might come back to it, if I find a really easy way to show you a more accurate graph.