Monthly Archives: May 2013

More Photo Diode Amplifier

More Photo Diode Amplifier – Investigating Miller Capacitance

In response to my posting of 31st December, my mate Nigel Machin left a comment that he thought that the miller capacitance of the voltage gain stage (Q2 in the CA3127 implementation, and Q11 in the discrete transistor version) would provide the dominant pole. The whole idea of this circuit was to have no pole dominant over that provided by the photo diode capacitance. The CA3127 transistors have hFE of 1 GHz, whereas my BC847s are a lot slower, and in simulation (but not in the hardware of the product) there was a little peak, indicating conjugation of closed loop poles.

I wanted to investigate this just a little further. Here are two moves I made in the LTSpice environment to understand this circuit a little better.

First, I wanted to open the loop. This circuit relies on a closed loop for DC conditions, so we need a loop that is closed at low frequencies and open in the frequency range of interest (where the diode capacitance and the the miller capacitance are introducing poles).

So here is the first move.

Image 1

The voltage generator V5 will be where I will introduce the AC signal for the Bode plot. The minus end of this is where the low frequency feedback is introduced. The feedback will reduce the gain, but when you see the Bode plot later you will see that the low frequency fall off in gain is decades away from the frequencies of interest. R10 will represent the loading that is applied to the emitter of the emitter follower in the real circuit. The emitter of the emitter follower is where I have opened the loop for high frequency considerations. R9 represents the feedback resistor in the real circuit, in its role as part of the loop. C3 is the capacitance of the photo diode.

Now this circuit gives me a path around the feedback loop but with the loop open, starting from the signal fed to the feedback resistor (Left end of R9) and then through the forward path to the emitter of the emitter follower output stage.

The second move is to do the same thing again, but to make a huge reduction in the Miller capacitance. I have done this by replacing the voltage gain stage (Q6 above) by a cascode.


I have chosen the 5 volt rail as a suitable point to tie the base of the top cascode transistor. This means that, allowing for some voltage swing, I need the collector of the top cascode transistor to be at a voltage that is somewhat higher then 5 volts. Fortunately, in the model world, we can pull stunts that would be tricky with real hardware, and I have raised the voltage of that collector with the fully floating voltage generator V3. The minus end of this will be at about 4.4 volts, so the plus end, the cascode transistor collector, will be at about 9.4. That will do nicely.

Now instead of having a voltage gain of about -100, Q2 will have a voltage gain round about -1.

This will reduce the impact of the Miller capacitance on the base of Q2 by a factor of 2/101. I built both of these circuits in a single model, which is just a simpleton’s way of providing for both Bode plots on the same axes.

Revised image (624 x 279)

Here are the Bode plots


The colours are:

Dark Green – Open Loop gain of cascode Circuit (emitter of Q3)

Light Green – Open Loop gain of original circuit (emitter of Q7)

Red – Voltage at photo diode (C1) in cascode circuit

Blue – Voltage at photo diode (C3) in original circuit.


Notice that where the Blue line is lower than the Red line, this means that the Miller capacitance is lowering the impedance at the diode (and this effect is greater without the cascode), even though there is that input emitter follower in between.

The time constant in the open loop path that is presented by the feedback resistor and the photo diode capacitance is 130 ns, which corresponds to ω = 7.7E6, and f = 1.22 MHz. (this is ignoring the impedance presented by the base of the first stage, which we know has some capacitive component.)

It is interesting that the phase margin for both circuits is about the same – 20 degrees, although the Cascode has unity gain at a little over 6 mHz, and the original circuit has unity gain at a little over 3MHz.

Transistor Photo Diode Amplifier

Transistor photo diode amplifier

In my first posting “ADALPAD”, I showed an example of an op-amp used as a photo diode amplifier and with a trimmer across the feedback resistor. That circuit (a nightmare from my past) had come to mind when I explored an idea I picked up in ADALPAD.

In some applications where fast transitions have to be reproduced, it is common to use a transresistance amplifier with a photo diode. This ensures a very low voltage excursion at the photo diode and thus very little charge wasted charging and discharging the diode capacitance. The diode capacitance together with the resistance driving it, creates a pole in the feedback loop. Instead of designing a two pole system with the diode capacitance and the op-amp dominant compensation pole, it is easier to leave out the op amp pole and let the diode capacitance provide a dominant pole.

Here is a circuit from Application Note 915 of the 1983 HP Optoelectronics Designer’s Catalog (sic) 1983. “Threshold Detection of Visible and Infrared Radiation with PIN Photodiodes”

(pp503 Figure 8 High Speed, High Gain Photodiode Amplifier)


transistor photo diode amplifier


The CA3127 is a monolithic array of uncommitted transistors.
These have hFE(min) = 35, and fT(min) = 1 GHz. I used this as a basis for several designs of my own. I did not need that bandwidth and was able to use discrete general purpose transistors. (See below for thermal issues) I was also able to increase R1 to get all the linear amplification I needed in the first stage. One application was data which was transferred at 9600 bits per second. At this data rate, it was vital that the linear amplifier was restricted to its linear range. Any saturation or cut-off of Q2 led to a failure of the feedback and a change in the charge on the diode capacitance. This in turn disabled the circuit which then took too long to recover.

One application, an optical communications port on a kilowatt hour meter, required operation over a dynamic range of more then 10:1. This could be easily allowed for by choosing R1 so that with the strongest signal, the output did not quite reach the maximum voltage of the linear range.

The elimination of R4 changed the second part into a comparator which provided a logic output. On some variants, I eliminated the emitter follower altogether.

The second stage of this circuit has an interesting and subtle feature. It is really a differential comparator (comparator below, differential amplifier above) , yet the usual differential input feature, the long tailed pair, is missing. The differential comparator, to act as a differential comparator, has to compare the voltage on the base of Q4 with what the voltage on Q4 would be if the circuit was in the quiescent state (no light on diode).. This is clearly two VBE drops (base – emitter junction of Q4 and Q5). The circuit cleverly provides an offset of just two base emitter junctions, as this is the output voltage of the first stage when there is no diode current, if we can ignore the volt drop in R1 due to Q1 base current.

Below is a schematic snippet of one of my implementations of this circuit.


My application


I do not still have the design notes for this, but the schematic brings some of the story to mind.

At this stage in the development of the thinking about the circuit, the emitter follower was still hanging in there, but I suspect it was not justified. The diode D26 is labelled “VESCOVI CLAMP” in the formal documentation. Of course it is a Baker clamp, but the special name is to honour my mate Tino Vescovi who realised the reason for a problem I was having. If the transistor Q20 had a high hFE, then the emitter current could be excessive in strong signal conditions. This warmed Q20 and Q21 and upset the balance with the b-e drops of Q10 and Q11. The Vescovi clamp fixed this. OPTORECH did not thus pull down to a single VCE(sat), but was nevertheless a suitable logic signal for the selected CMOS logic to follow.

Note the 1M resistor R164 which provided about 80 mV hysteresis at the emitter of Q19. the voltage divider R116 and R160 was not present in the original circuit. This determined the photodiode current for the logic threshold.

A lot of tricks in there. I really only wanted to share this for the use of the photodiode capacitance for the dominant pole for the transresistance stage.



In the last post I mentioned that we are so used to “Op Amp” thinking these days that we take some big simplifications for granted. An example is the output resistance of the op amp being very low. This resistance will usually break with stray capacitance at some frequency way out where we don’t care. In an example I looked at last time, we had a single stage exhibiting a two pole response. Of course the single stage (a BJT, say) will exhibit an output resistance that is not much lower than the collector load. It might break with stray capacitance at a frequency not too far removed from the frequency at which the input capacitance is having its impact.

Further on in ADALPAD, (pp 780 in Chapter 14 “Amplifiers with Multistage Feedback”) there is a two stage amplifier.

Two stage circ

 This circuit, or one very much like it, was promoted in “Radio and Hobbies” magazine when I was a high school student. I remember wondering at the time why two different transistor types were specified, when the duty seemed to be within the capabilities of either type. Looking back after all these years I would have to say that I suspect that the Radio and Hobbies people would not have known the answer.

The caption to the circuit in ADALPAD reads:

Fig. 14.35 Circuit diagram for an audio-frequency current -feedback pair. The gain is about 75, and the bandwidth about 8 Hz to 200kHz. OC44: alloyed germanium transistor, ΒN =60, fT = 10 MHz; OC71: alloyed germanium transistor, ΒN = 40, fT = 500 kHz.

Further down, the authors write:

Two stage text

 It all makes sense now. Note that as the feedback is taken from the second transistor emitter, the collector is not in the feedback loop, so stray capacitance on the collector will have little impact on the feedback loop. It is interesting that in those days a designer could choose transistors with confidence that their fvalues could be in a known relationship. Maybe in those days the transistor manufacturers had a lot of trouble getting a specified   fTand were selecting transistors for a specific “fT bin”. I don’t think that we could do that these days. My impression has been that transistor manufacturers generally specify a minimum value for fT and no maximum. I did a quick Google search on available data sheets and made up this table.

 What the data sheets tell us about fT


My quick Google search yielded only one transistor for which a maximum as well as a minimum for fwas specified, and they are an octave apart. I have a very old transistor data book which I keep because it provides much more data about transistors than is generally available these days. (National Semiconductor Transistors 1973) That book does specify some transistors where both a minimum and a maximum value for fis cited. Note that the min and max are at least 2 octaves apart. This data does not provide for precise placement of poles in the transfer function of an amplifier design.

Come to think of it, have you ever seen a Maximum as well as a Minimum for the gain Bandwidth product on an Op Amp data sheet?

I think that circuits of the type depicted above are just not possible with today’s parts. One would have to place a capacitor somewhere to get one of those poles way below the other. 

In November, I attended the annual “Student Projects Showcase” of the faculty of Science and Engineering at LaTrobe University. This is the department that was set up by the Hooper of ADALPAD. In the program for the evening, there was a little spiel about Daryl Hooper and I was pleased to see that mention was made of ADALPAD. I wonder how many of the 2012 students had read it.


Hooper blurb








I first heard of the book Amplifying Devices and Low Pass Amplifier Design (commonly known as ADALPAD) after it was already out of print. The title seems a little strange as all amplifiers must have a finite bandwidth, so maybe they are all Low Pass Amplifiers. Perhaps the distinction is being made from tuned amplifiers as used in radio receivers (and transmitters). The book was written by Ed Cherry and Daryl Hooper, both interesting blokes. It was published in 1968 when vacuum tubes and germanium transistors were both still taken seriously. Many things have changed since then, but the principles have not. If there is a more modern book covering the same scope, I don’t know about it.

The monolithic operational amplifier now dominates the field, and this forces an engineer to take a different approach. Let us not forget how things work, even if things are so often made easy for us these days.

When I fist saw the book, I could not buy one, so I borrowed one and photocopied the whole thing. This is breech of copyright but Ed Cherry signed my photocopy for me, so he could have not been too resentful about missing out on his commission. The photocopy book was a little inconvenient, and since I copied it, the internet has provided easy access to the entire world second-hand book market, so I decided to treat myself with a real one. Mine is from the library of the University of Sunderland in the UK. This is not the first second-hand book that I have purchased that has come from a university library. My John Maynard Smith sex book is also from a uni library. What are these librarians doing? What will the young kiddies do when they need to refer to these books and find they have been sold to me?

Oh Dear!

Years ago, I had located another out-of-print book Network Analysis and Feedback Amplifier Design by Hendrik Bode and had made myself a photocopy of that as well. I mentioned to Ed Cherry that I was struggling with it and he told me that he reckoned that he had made a rather good job of an exegesis of that in Chapter 14 of ADALPAD.

Last weekend was a long weekend away for us, so I took my new (to me) ADALPAD, and read Chapter 14 twice. That sent me off to read other chapters (prerequisites). I have been having a beaut time with it.

Chapter 13 is headed “Peaking”. In amplifier design, this is the creation of a peak in the amplifier response where there would otherwise be a hole or a falling away. I was flicking through, and found a capacitor across the feedback resistor in a shunt feedback stage.


 My first reaction was that the capacitor across the shunt feedback resistor would introduce a pole to the closed loop response and lower the bandwidth. Then I realized that I had been guilty of oversimplified thinking brought on by too much op-amp work.

Here is an LTSpice model circuit.


 The values of this were chosen with very little thought. I just wrote down numbers as fast as I could draw the circuit. Are they relevant to a real circuit? Here is the interesting result.


Notice that I stepped the capacitor C3 in 1 pF steps, starting from 1 pF. The second trace (second from the top – the dark blue one) is probably the one we would go for. That is C3 = 2 pF. Notice that all the lines converge on the same asymptote at the high frequency end. Isn’t that neat!

Here we have two poles in the forward path. In my model, I have made them (ignoring the loading of the feedback path) coincident. Perhaps it is better to avoid two poles that close together if you can. This reminds me of a circuit that I plucked from an HP application note (Application Note 1008 Optical Sensing for the HEDS-1000) many years ago. The HEDS-1000 was a bar code reading device.


The CA3130 is a MOS input internally compensated Op-Amp with a 15 MHz gain bandwidth product. The internal dominant pole and the pole created by the feedback resistor and the capacitance of the photo diode both most likely come before the gain drops to unity. The 2-25pF trimmer would be intended to perform the same function as C3 in my circuit model above. This circuit gave trouble in my application, and besides, who wants to have a trimmer capacitor (and the need of a process to set it) if that is unnecessary. The better trick, which I have used many times, is to use an amplifier made of discrete transistors, and allow the photo diode with whatever resistance it is associated with to take the place of dominant pole without competition.