Transistor photo diode amplifier
In my first posting “ADALPAD”, I showed an example of an op-amp used as a photo diode amplifier and with a trimmer across the feedback resistor. That circuit (a nightmare from my past) had come to mind when I explored an idea I picked up in ADALPAD.
In some applications where fast transitions have to be reproduced, it is common to use a transresistance amplifier with a photo diode. This ensures a very low voltage excursion at the photo diode and thus very little charge wasted charging and discharging the diode capacitance. The diode capacitance together with the resistance driving it, creates a pole in the feedback loop. Instead of designing a two pole system with the diode capacitance and the op-amp dominant compensation pole, it is easier to leave out the op amp pole and let the diode capacitance provide a dominant pole.
Here is a circuit from Application Note 915 of the 1983 HP Optoelectronics Designer’s Catalog (sic) 1983. “Threshold Detection of Visible and Infrared Radiation with PIN Photodiodes”
(pp503 Figure 8 High Speed, High Gain Photodiode Amplifier)
The CA3127 is a monolithic array of uncommitted transistors.
These have hFE(min) = 35, and fT(min) = 1 GHz. I used this as a basis for several designs of my own. I did not need that bandwidth and was able to use discrete general purpose transistors. (See below for thermal issues) I was also able to increase R1 to get all the linear amplification I needed in the first stage. One application was data which was transferred at 9600 bits per second. At this data rate, it was vital that the linear amplifier was restricted to its linear range. Any saturation or cut-off of Q2 led to a failure of the feedback and a change in the charge on the diode capacitance. This in turn disabled the circuit which then took too long to recover.
One application, an optical communications port on a kilowatt hour meter, required operation over a dynamic range of more then 10:1. This could be easily allowed for by choosing R1 so that with the strongest signal, the output did not quite reach the maximum voltage of the linear range.
The elimination of R4 changed the second part into a comparator which provided a logic output. On some variants, I eliminated the emitter follower altogether.
The second stage of this circuit has an interesting and subtle feature. It is really a differential comparator (comparator below, differential amplifier above) , yet the usual differential input feature, the long tailed pair, is missing. The differential comparator, to act as a differential comparator, has to compare the voltage on the base of Q4 with what the voltage on Q4 would be if the circuit was in the quiescent state (no light on diode).. This is clearly two VBE drops (base – emitter junction of Q4 and Q5). The circuit cleverly provides an offset of just two base emitter junctions, as this is the output voltage of the first stage when there is no diode current, if we can ignore the volt drop in R1 due to Q1 base current.
Below is a schematic snippet of one of my implementations of this circuit.
I do not still have the design notes for this, but the schematic brings some of the story to mind.
At this stage in the development of the thinking about the circuit, the emitter follower was still hanging in there, but I suspect it was not justified. The diode D26 is labelled “VESCOVI CLAMP” in the formal documentation. Of course it is a Baker clamp, but the special name is to honour my mate Tino Vescovi who realised the reason for a problem I was having. If the transistor Q20 had a high hFE, then the emitter current could be excessive in strong signal conditions. This warmed Q20 and Q21 and upset the balance with the b-e drops of Q10 and Q11. The Vescovi clamp fixed this. OPTORECH did not thus pull down to a single VCE(sat), but was nevertheless a suitable logic signal for the selected CMOS logic to follow.
Note the 1M resistor R164 which provided about 80 mV hysteresis at the emitter of Q19. the voltage divider R116 and R160 was not present in the original circuit. This determined the photodiode current for the logic threshold.
A lot of tricks in there. I really only wanted to share this for the use of the photodiode capacitance for the dominant pole for the transresistance stage.