Transistor Porn 2

I have been looking at some other people’s blogs. It looks as if you have to have a picture right up the top of the posting to make the page look interesting. Here is a picture of a design review meeting.

It is a constant bother trying to keep a blog looking the way you want. I went to a lot of trouble with this one, but it keeps reverting back to features that I went to a lot of trouble to eliminate months ago. I fear that whenever I agree to a WordPress update, it overwrites my stylesheet files with its favourites! Anyone know how to fix this?

Anyway, enough about that and down to work. Astute readers will have noticed that the last posting had a reply from James Fenech.

I was going to put a picture of James Fenech here, but then I thought, why not put in a picture of Mary Fenech instead? You will recall that in the last posting, I showed several variations on a transistor buffer that would work a 10k load with a 24 volt supply. These requirements were completely arbitary, and when examined closely, were a bit silly. However, we left them “as is” as a basis for comparison. The original circuits that I used in the last posting were prepared over a year ago, in a bit of a rush, but I left the circuits the same, as several people had seen the circuits in the past, and I wanted to leave the last posting as a record of what had become an interesting conversation piece.

Quite apart from the silly output conditions, the various circuits were just several stabs into the darkness of a multi-dimensional concept space without any attempt to optimize any of them according to any particular criterion or other. The original circuit with the capacitor to the base, had been suggested by James, so it was his baby, and I suspect that he felt that with the particular choices of detail that I had made, I had not shown it in its best light. He simulated a circuit of his own, which I reproduce here.

His circuit provided four buffer options. One was just a plain circuit that I had used, but three contained interesting new thinking. these were:
1. Vcb (Which I called Vec on the trace)
This is an npn transistor driven at the emitter. This minimizes the effect of the miller capacitance as in the top transistor that I had used in the Cascode. I suspect that this could be optimized further.
2. Vcb2 (Which I called V(fenech) on the trace)
This common emitter circuit uses a capacitor to smarten up the transistor, but limits the capacitor current (and tailors the capacitor charge and discharge times) with a series resistor. This would be a really practical circuit.

3. Vbaker (Which I called V(bakerschot) on the trace, as I already had a Vbaker)
This was the same as the baker clamp circuit that I had shown last time, except that he used schottky diodes.

I am sorry that each of these has two names. I named the traces to make the trace picture look good without realizing that I was creating multiple namings. Here are the results:

Note that:

(a) the emitter driven circuit is quite fast.
(b)The V(fenech) circuit will certainly have limited drive current, and thus has an advantage over my completely impractical one, (see last post) but this advantage is achieved at the expense of speed.
(c) The Baker clamp with the schottky diodes is slower than the Baker clamp with 1N914’s. Would only use this if the far better saturation was important.

Maybe you are thinking that it was mean of me to choose the good looking Fenech for my earlier photo. You have to admit that it was up near the beginning of the post, and it was important not to put readers off. You be the judge.

James Fenech

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